During the process of data transmission, a transmitter continuously transmits signals to a receiver. The receiver uses a clock and data recovery (CDR) circuit to generate a clock corresponding to the incoming data stream, thereby correctly retiming the incoming data. Clock and data recovery (CDR) circuits may be based on a phase-locked loop (PLL) or an over-sampler. A PLL based CDR circuit generates a clock from an approximate frequency reference and uses the generated clock to phase-align to the transitions in the data stream with the PLL. The generated clock is a recovered clock transmitted by the transmitter.
Typically, the physical cable exhibits the characteristics of a low-pass filter. Therefore, the amplitude of the recovered data, received at the receiver, is attenuated and the phase is distorted. Also, the physical cable typically consists of wires which are not perfectly shielded. Thus, noise is present in the recovered data due to cross coupling between signals from different wires. In addition, external conditions, such as temperature changes, wear and tear of the cable, and so on may affect the amplitude of the receive signals.
Transmitted serial signals can be modulated using, for example, N level pulse amplitude modulation (PAM-N) technique, where N discrete voltage levels are used to encode input bits. The two common PAM techniques utilized to modulate high-speed serial signals are PAM-2 (also known as non-return-to-zero “NRZ”) or PAM-4. In a PAM-2 two levels are used to encode a single bit. In a PAM-4, two bits are mapped to one of four possible differential voltage levels, for example, −3 volts, −1 volt, 1 volt, and 3 volts. Demodulation is performed by detecting the amplitude level of the carrier at every symbol period. The PAM-4 allows transmitting signals at double the rate of the PAM-2 signal, but the loss of PAM-4 modulated signals is higher than that of PAM-2 modulated signals. Experiments have shown that when the loss of the physical medium is more than 10 dB, the PAM-4 has been used in preference to PAM-2.
When transmitting PAM-4 modulated signals, the receiver should implement a clock and data recovery (CDR) circuit for recovering such signals. A PAM-4 CDR circuit typically detects the correct point to sample the incoming data stream. In a PAM-4 signal each 2-bit may include four transitions. An example for an implementation of a PAM-4 CDR circuit can be found in a U.S. patent application Ser. No. 13/157,526 titled “APPARATUS AND METHOD THEREOF FOR CLOCK AND DATA RECOVERY OF N-PAM ENCODED SIGNALS USING A CONVENTIONAL 2-PAM CDR CIRCUIT” (hereinafter “the '526 application”), assigned to the common assignee and hereby incorporated by reference.
The recovery of the signal, as discussed in the '526 application, is performed by comparing an input PAM-4 data signal to 3 configurable thresholds, each of which is set to a different voltage level, detecting major and minor transitions from one logic value to another logic value based on comparisons of the input data stream to the thresholds, and recovering the bits' values modulated in the input data when a minor transition has been detected. The outputs of the comparators, i.e., crossings of the thresholds, determine the PAM-4 levels of the input signal. Thus, the thresholds must be properly set to allow correct recovery of the signal.
The comparators' thresholds are set during power-up of the receiver typically to voltage levels around the common-mode (CM) voltage level of the circuit. However, PAM-4 voltage levels may be fluctuated due to changes in the environmental conditions in the cable and/or the CDR circuit. For example, as shown in FIG. 1, a cable 110 connects a transmitter 120 to a receiver 130. The transmitter 120 transmits PAM-4 modulated signals. The receiver 130 demodulates the received signals using a PAM-4 CDR circuit (not shown) included therein. This configuration may be found in any electronic device, such as a flat screen TV, a laptop computer, a DVD player, and the like.
Thus, for example, temperature changes in the electronic device may impact both the cable 110 and the receiver 130 and even the transmitter 120 (that may also include a PAM-4 CDR circuit). The temperature changes inside the device may cause variations in the attenuation level in the cable 110, the receiver 130, and even the transmitter 120. This would directly impact the transfer function of the cable 110, thus degrading the performance of the receiver 130 as data would not be properly recovered, i.e., there would be an increased number of a bit-error-rate.
It would be, therefore, advantageous to provide a solution to compensate for environmental conditions that create changes in the receiver, the transmitter, and/or cable, to enable correct clock and data recovery of PAM-N modulated signals.